Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters. Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations are suggested to optimize this performance. Furthermore, a new closed formula has been derived to account for the influence of the transistor mismatch on the achievable resolution of the current-steering D/A converter. To allow a thorough understanding of the dynamic behavior, a new factor has been introduced. Moreover, the frequency dependency of the output impedance introduces harmonic distortion components which can limit the maximum attainable spurious free dynamic range. The validity of all the derived concepts has been demonstrated in the design and implementation of different D/A converters ranging from high resolution to high speed devices, which also resulted in the first published 10 bit 1GSample/s CMOS current-steering D/A converter. Finally, the last part of the book gives an overview on different existing transistor mismatch models and the link with the static performance of the D/A converter. Static and Dynamic Performance Limitations for High Speed D/A Converters serves as an invaluable reference book and may be used as a text for advanced courses on the subject.