Analog Behavioral Modeling with the Verilog-A Language

This volume provides the IC designer with an introduction to the methodologies and uses of analogue behavioural modelling with the Verilog-A language. In doing so, an overview of Verilog-A language constructs as well as applications using the language are presented. In addition, the book is accompanied by the Verilog-A Explorer IDE (Integrated Development Environment), a limited capability Verilog-A enhanced SPICE simulator for further learning and experimentation with the Verilog-A language. This book assumes a basic level of understanding of the usage of SPICE-based analog simulation and the Verilog HDL language, although any programming language background and a little determination should suffice. Verilog-A is a new hardware design language (HDL) for analogue circuit and systems design. Since the mid-1980s, Verilog HDL has been used extensively in the design and verification of digital systems. However, there have been no analogous high-level languages available for analog and mixed-signal circuits and systems. Verilog-A provides a new dimension of design and simulation capability for analog electronic systems.
Previously, analogue simulation has been based upon the SPICE circuit simulator or some derivative of it. Digital simulation is primarily performed with a hardware description language such as Verilog, which is popular since it is easy to learn and use. Making Verilog more worthwhile is the fact that several tools exist in the industry that complement and extend Verilog’s capabilities. The text provides a good introduction and starting place for students and practicing engineers with interest in understanding this new level of simulation technology. It contains numerous examples that should enhance the text material and provide a helpful learning tool for the reader. The text and the simulation program included should be used for individual study or in a classroom environment.